- 1 Debug Card INDICATORS
- 2 INSTALLING Debug Card TO INSTALL A Debug Card:
- 3 Error Code
Debug Card is a powerful diagnostic tool for technicians and administrators to troubleshoot
various problems of IBM compatible PCs. It is easy to install, yet extremely powerful to use. With
Debug Card in hand, you no longer have to go through tedious and time consuming process of
trying to figure out what is wrong with your PC hardware. Debug Card will tell you exactly what
is wrong with your PC in just seconds. It saves you time and money.
Our new and improved design of Debug Card diagnostic card can work with almost all popular
types of CPUs, Motherboards, and BIOSes.
The Debug Card itself only requires an empty PCI or ISA expansion slot. It is not necessary to
install memory chips to perform analysis. “POST Codes” can be displayed through the
hexadecimal display panel on the Debug Card itself.
Debug Card INDICATORS
‘Indicators’ are any light emitting diodes(LED) or hexadec imal display panel that may be
mounted on an Debug Card. This section discusses the following indicators that appear on the
- l POST Code Display
- l PCI BUS SIGNALS LEDs
- POST Code Display
- The POST Code Display is made up of a dual, dot matrix hexadecimal read-out that displays
- Power On Self Test (POST) status codes.
PCI Signal Definition:
=>CLK -Motherboard Clock Signal. Should be on when power is supplied to the
motherboard even without CPU.
=>BIOS– BIOS Read Signal. Flashes when CPU reads BIOS code.
=>IRDY -Device Ready. Flashes when an IRDY signal is detected.
=>OSC -ISA Oscillation Indicator. Indicate ISA Oscillation Signal is available.
=>FRAME– PCI Bus Frame. Should be on under normal circumstances and flashes
when a PCI Frame Signal is detected.
=>RST– Reset. After power on or reset, this indicator should be on for an half
second and then turned off.
=>12V Power Supply, 12-Volt Positive. Should be on all the time otherwise there
is a short circuit.
=>-12V Power Supply, 12-Volt Negative. Should be on all the time otherwise there
is a short circuit.
=>5V Power Supply, 5-Volt Positive. Should be on all the time otherwise there is
a short circuit.
=>-5V Power Supply, 5-Volt Negative. Should be on all the time otherwise there
is a short circuit.
=>3V3 Power Supply, 3.3-Volt. Some motherboards have 3.3V power supply to
PCI slots. This indicator should be on if the motherboard supplies 3.3V
INSTALLING Debug Card TO INSTALL A Debug Card:
1) Install the Debug Card in any available PCI or ISA expansion slot.
2) Power on the machine.
THE POST PROCESS
The ROM built onto the motherboard of the computer rums its built-in POST (Power-On Self-Test)
when you switch power on to the computer, press the reset button on the computer, or press
Ctrl-Alt-Del (warm boot). POST performs a tightly interwoven initialization and testing process
for each of these methods, but it typically does not test or initialize memory above 64K for warm
CODE Award AMI Phoenix4.0/Tandy3000
00 Copying code to specific area is done. Passing control to INT 19h boots loader next.
01 Processor Test 1 verifies Processor status (1FLAGS) . Test the following processor status flags: carry, zero, sign, overflow. CPU is testing the register inside or the test fails, please check the CPU or replace it.
The BIOS sets each flags and verifies whether they are set. After then It turns each flag off and verifies whether it is off.
02 Test All CPU Registers Except SS, SP, and BP with Data FF and 00 Verify Real Mode
03 Disable NMI, PIE, AIE, UEI, SQWV. The NMI is disabled. Next, It checks a soft reset or the power condition Disable Non maskable Interrupt (NMI)
Disable video, parity checking, DMA.
Reset math coprocessor.
Clear all page registers, CMOS shutdown byte.
Initialize timer 0, 1, and2, including set EISA timer to a known state.
Initialize DMA controllers 0 and 1.
Initialize interrupt controllers 0 and 1.
Initialize EISA extended registers.
04 RAM must be periodically refreshed to keep the memory from decaying. This refreshing function is working properly. Get CPU type
05 Keyboard Controller Initialization The BIOS stack has been built. Next, it disable cache memory. DMA initialization is in progress or fails
07 Verifies whether CMOS is Working correctly, Detects whether battery is bad Initialize the CPU and the CPU data area subsequently. Disable shadow and execute code from the ROM.
08 Early chip set initialization The CMOS checksum is computed. Initialize chipset with initial POST values, Memory presence test , OEM chip set routines , Clear low 64K memory
, Test first 64K memory
0A Initialize first 120 interrupt vectors with SPURIOUS-INT-HDLR and initialize INT 00h-1Fh according to INT-TBL. The CMOS checksum calculation is done. Initialize the CMOS status register for date and time next. Initialize CPU registers
ued Enable CPU cache
0C Detect Type of Keyboard Controller. The keyboard controller input buffer is free. Next, issue the BAT command to the keyboard controller. Initialize caches to initial POST values Set NUM_LOCK Status
0D Detect CPU Clock;
Read CMOS location 14h to find out type of video in use.
Detect and initialize video adapter.
0E Test Video Memory and write sign-on information to screen. The keyboard controller BAT command result has been verified. Next, perform any necessary initialization after the keyboard controller BAT command test Initialize I/O component
Setup shadow RAM? Enable shadow according to setup.
0F Test DMA Cont. 0; BIOS Checksum Test. The initialization after the keyboard controller BAT command test is done. The keyboard command byte is written next. Initialize the local IDE bus.
Detect and Initialize Keyboard.
10 Test DMA Controller 1 The keyboard controller command byte is written. Next, issue the Pin 23 and 24 blocking and unblocking command Initialize Power Management
11 Test DMA Page Registers Next, check if <End> or <Ins> keys were pressed during power on. Initializing CMOS RAM if the Initialization CMOS RAM in every boot AMIBIOS POST option was set in AMIBCP or the <End> key was pressed. Load alternate registers with initial POST values
12 Reserved Next, disabling DMA controllers 1 and 2 and interrupt controllers 1 and 2 Restore CPU control word during warm boot
13 Reserved The video display has been disabled. Port B has been initialized. Next, initialize the chipset. Initialize PCI Bus primary devices
14 Test 8254 Timer 0 Counter 2 The 8254 timer test will begin next. Initialize keyboard controller
15 Verify 8259 Channel 1 Interrupts by Turning Off and On the Interrupt Lina
16 Verify 8259 Channel 2 Interrupts by Turning Off and On the Interrupt Lina BIOS ROM checksum
17 Turn Off Interrupts and verify whether Non maskable Interrupt Register is On Initialize cache before memory Auto size
18 Force an Interrupt and Verify the Interrupt Occurring. Initialize 8254 timer.
19 Test Stuck NMI Bits; Verify whether NMI Can Be Cleared The 8254 timer test is over. Starting. The memory refresh test is after that
1A Display CPU clock The memory refreshing lina is triggered. Check the 15 microsecond on/off time next Initialize 8237 DMA controller
1C Reserved Reset Programmable Interrupt Controller
1F If EISA non-volatile memory checksum is normal, execute EISA initialization.
If not, execute ISA tests and clear EISA mode flag.
Test EISA configuration memory
Integrity (checksum & communication interface).
20 Initialize Slot 0 (System Board) Test whether DRAM refreshes.
21 Initialize Slot 1
22 Initialize Slot 2 Test 8742 Keyboard Controller
23 Initialize Slot 3 Read the 8042 input port and disable the MEGAKEY Green PC feature next. Make the BIOS code segment rewrite and perform any necessary configuration before initializing the interrupt vectors
24 Initialize Slot 4 The configuration is required before interrupt vector initialization has completed. Interrupt vector initialization is about to begin Set ES segment register to 4 GB
25 Initialize Slot 5 Interrupt vector initialization is done. Clearing the password if the POST DIAG switch is on.
26 1.test the exception situation of protected mode. Please check the memory of CPU and main board.
2.no fatal trouble, VGA displayed normally. If nonfateful trouble occurred, then display error message in VGA, else Boot operating system. Now code 26 is OK code, and no any other codes can be displayed. 1.Read /write、input、output port of 8042 keyboard, readyfor resolve mode, continue to get ready for initialization of all data,check the 8042 chips on main board.
2.refered to the left . 1.enable A20 address line, check the A20 pins of memory controlling chips, and check circuit, correlated to pins. In memory slot, may be A20 pin and memory pins are not in contact, or memory A20 pins bad.
2.refered to the left.
27 Initialize Slot 7 Any is initialized before. Setting video mode will be done next
28 Initialize Slot 8 Initialization is done before. Setting the video mode completes. Configure the monochrome mode and color mode settings next Auto size DRAM
29 Initialize Slot 9 Initialize POST Memory Management
2A Initialize Slot 10 Initialize the different bus system and static output devices, if it is present Clear 512 KB base RAM
2B Initialize Slot 11 Passing control to the video ROM to perform any required configuration before the video ROM test.
2C Initialize Slot 12 All necessary processing before passing control to the video ROM is done. Look for the video ROM next and pass control to it. RAM fails on address l lina XXXX*
2D Initialize Slot 13 The video ROM has returned control to BIOS POST. Performing any required processing is after the video ROM had control.
2E Initialize Slot 14 Complete post-video ROM test processing. If the EGA/VGA controller is not found, perform the display memory read/write test next RAM fails on data bits XXXX* of low byte of memory bus
2F Initialize Slot 15 The EGA/VGA controller was not found. The display memory read/write test is about to begin Enable cache before system BIOS shadow
30 Size of base Memory From 256K to 640K and Memory is Extended Above 1MB. The display memory read/write test passed. Look for retracing checking next
31 Test Base Memory From 256K to 640K and Memory Extended Above 1MB The display memory read/write test or retracing checking failed. Perform the alternate display memory read/write test next
32 If EISA Mode, Test EISA Memory Found in Slots Initialization The alternate display memory read/write test passed
. Look for alternate display retracing checking next. Test CPU bus-clock frequency
33 Reserved Initialize Phoenix Dispatch manager
34 Reserved Video display checking is over. Set the display mode next.
36 Reserved Warm start and shut down
37 Reserved The display mode is set. Displaying the information when it boots next.
38 Reserved Initialize the bus input, IPL and general devices next, if present Shadow system BIOS ROM
39 Reserved Display bus initialization error messages.
3A Reserved The new cursor position has been read and saved. Display the Hit <DEL> message next Auto size cache
3B Reserved The Hit <DEL> message is displayed. The protected mode memory test is about to start.
3C Setup Enabled Advanced configuration of chipset registers
3D Detect if Mouse is Present, Initialize Mouse, Install Interrupt Vectors Load alternate registers with CMOS values
3E Initialize Cache Controller
40 Display Virus Protest Disabled or Enabled Prepare the descriptor tables next
41 Initialize Floppy Disk Drive Controller and Any Drives Initialize extended memory for Rom Pilot
42 Initialize Hard Drive Controller and Any Drives The descriptor tables are prepared. Enter protected mode for the memory test next Initialize interrupt vectors
43 Detect and Initialize Serial & Parallel Ports and Game Port Entered protected mode. Enable interrupts for diagnostics mode next.
44 Reserved Interrupts is enabled if the diagnostics switch is on. Initialize data to check memory wrapping around at 0:0 next.
45 Detect and Initialize Math Coprocessor Data initialized. Check for memory wrapping around at 0:0 and find the total system memory size next POST device initialization
46 Reserved The memory wrapping around test is done. Memory size calculation has been done. Writing patterns to test memory next Check ROM copyright notice
47 Reserved The memory pattern has been written to extended memory. Write patterns to the base 640 KB memory next. Initialize I20 support
48 Reserved Patterns write in base memory. Determine the amount of memory below 1 MB next. Check video configuration against CMOS
49 Reserved The amount of memory below 1 MB has been found and verified. Determine the amount of memory above 1 MB memory next. Initialize PCI bus and devices
Reserved Initialize all video adapters in system
4B Reserved The amount of memory above 1 MB has been found and verified. Check for a soft reset and clear the memory below 1 MB for the soft reset next. If this is a power on situation, go to checkpoint 4Eh next. Quiet Boot start (optional)
4C Reserved The memory below 1 MB has been cleared via a soft reset. Clear the memory above 1 MB next. Shadow video BIOS ROM
4D Reserved The memory above 1 MB has been cleared via a soft reset. Save the memory size next. Go to checkpoint 52h next
4E Reboot if it is Manufacturing Mode; If not, Display Messages and Enter Setup The memory test started, but not as the result of a soft reset. Displaying the first 64 KB memory size next. Display BIOS copyright notice
4F Ask Password Security (Optional) The memory size display has started. The display is updated during the memory test. Perform the sequential and random memory test next Initialize Multi Boot
50 Write All CMOS Values Back to RAM and Clear The memory below 1 MB has been tested and initialized. Adjust the displayed memory size for relocation and shadowing next. Display CPU type and speed
51 Enable Parity Checking. Enable NMI, Enable Cache Before Boot The memory size display was adjusted for relocation and shadowing. Testing the memory above 1 MB next.
52 Initialize Option ROMs from C8000h to EFFFFh or if FSCAN Enabled to F7FFFh The memory above 1 MB has been tested and initialized. Saving the memory size information next. Test keyboard
53 Initialize Time Value in 40h: BIOS Area The memory size information and the CPU registers are saved. Enter real mode next.
54 Shutdown was successful. The CPU is in real mode. Disable the Gate A20 line, parity, and the NMI next Set key click if enabled
55 Enable USB devices
57 The A20 address line, parity, and the NMI are disabled. Adjust the memory size depending on relocation and shadowing next.
58 The memory size was adjusted for relocation and shadowing. Clear the Hit <DEL> message next Test for unexpected interrupts
59 The Hit <DEL> message is cleared. The <WAIT…> message is displayed. Start the DMA and interrupt controller test next. Initialize POST display service
5A Display prompt “Press F2 to enter SETUP”.
5B Disable CPU cache
5C Test RAM between
60 Setup virus protection (boot sector protection) functionality according to setup setting. The DMA page register test passed. Perform the DMA Controller 1 base register test next.
61 Try to turn on level 2 cache (if L2 cache has already turned on in post 3D, this part will be skipped)
Set the boot up speed according to setup setting
Last chance for chipset is initialized
Last chance for power management is initialized(reen BIOS only)
Show the system configuration table &nbs
62 Setup NUM Lock Status According to Setup values The DMA controller 1 base register test passed. Perform the DMA controller 2 base register test next Test extended memory address lina
Program the NUM lock, Set matic rate & typematic speed according to setup.
63 If there is any changes in the hardware configuration. Update the ESCD information (PnP BIOS only)
Clear memory that have been used
Boot system via INT 19h
64 Jump to UserPatch1
65 The DMA controller 2 base register test passed. Programme DMA controllers 1 and 2 next.
66 Complete programming DMA controllers 1 and 2. Initialize the 8259 interrupt controller next. Configure advanced cache registers
67 Complete 8259 interrupt controller initialization. Initialize Multi Processor APIC
68 Enable external and CPU caches
69 Set up System Management Mode (SMM) area
6A Display external L2 cache size
6B Load custom defaults (optional)
6C Display shadow-area message
6E Display possible high address for UMB recovery
70 Display error message
72 Check for configuration errors
76 Check for keyboard errors
7C Set up hardware interrupt vectors
7D Initialize Intelligent System Monitoring
7E Initialize coprocessor if present.
7F Enabling extended NMI source is in progress.
80 The keyboard test has started. Clear the output buffer and check for stuck keys. Issue the keyboard reset command nex.t Disable onboard Super I/O ports and IRQs.
81 A keyboard reset error or stuck key was found. Issue the keyboard controller interface test command next. Late POST device initialization.
82 The keyboard controller interface test completed. Write the command byte and initialize the circular buffer next. Detect and install external RS232 ports
83 The command byte was written and global data initialization has completed. Check for a locked key nex.t Configure non-MCD IDE controllers
84 Locked key checking is over. Check whether a memory size mismatch with CMOS RAM data next. Detect and install external parallel ports
85 The memory size check is done. Display a soft error and check for a password or by passing WINBIOS is
Set up next. Initialize PC-compatible PnP ISA devices
86 The password was checked. Perform any required programming before WINBIOS Setup next. Re-initialize onboard I/O ports.
87 The programming before WINBIOS Setup has completed. Uncompress the WINBIOS Setup code and execute the AMIBIOS Setup or WINBIOS Setup utility next. Configure Motherboard Configurable Devices (optional)
88 Returned from WINBIOS Setup and cleared the screen. Perform any necessary programming after WINBIOS Setup next. Initialize BIOS Data Area
89 The programming after WINBIOS Setup has completed. Display the power on screen message next. Enable Non-Maskable Interrupts (NMIs)
8A Initialize Extended BIOS Data Area
8B The first screen message has been displayed. The <WAIT…> message is displayed. Perform the PS/2 mouse check and extended BIOS data area allocation check next. Test and initialize PS/2 mouse
8C Programme the WINBIOS Setup options next. Initialize floppy controller
8D The WINBIOS Setup options are programmed. Reset the hard disk controller next.
8E The hard disk controller has been reset. Configure the floppy drive controller next.
8F Determine number of ATA drives (optional)
90 Initialize hard-disk controllers
91 The floppy drive controller has been configured. Configure the hard disk drive controller next. Initialize local-bus hard-disk controllers
92 Jump to UserPatch2
93 Build MPTABLE for multi-processor boards
95 Initialize bus adaptor ROMs from C8000h through D8000h Install CD ROM for boot
96 Initialize before passing control to the adaptor ROM at C800 Clear huge ES segment register
97 Initialize before the C800 adaptor ROM gains control has completed. The adaptor ROM check is next. Fix up Multi Processor table
98 The adaptor ROM had control and has now returned control to BIOS POST. Perform any required processing after the option ROM returned control A Search for option ROMs. One long, two short beeps on checksum fails.
99 Any initialization required after the option ROM test has completed. Configure the timer data area and printer base address next. Check for SMART Drive (optional)
9A Set the timer and printer base addresses. Set the RS-232 base address next. Shadow option ROMs
9B Returned after setting the RS-232 base address. Perform any required initialization before the Coprocessor test next.
9C Required initialization before the Coprocessor test is over. Initialize the Coprocessor next Set up Power Management
9D Coprocessor initialized. Perform any required initialization after the Coprocessor test next. Initialize security engine (optional)
9E Initialization after the Coprocessor test is complete. Check the extended keyboard, keyboard ID, and Num Lock key next. Issuing the keyboard ID
Enable hardware interrupts
9F Determine number of ATA and SCSI drives
A0 Set time of day
A1 Check key lock
A2 Display any soft error next
A3 The soft error display has completed. Set the keyboard typematic rate next. &
A4 The keyboard typematic rate is set. Programme the memory wait states next Initialize typematic rate
A5 Memory wait state programming is over. Clear the screen. Enable parity and the NMI next
A7 NMI and parity is enabled. Perform any initialization required before passing control to the adaptor ROM at E000 next.
A8 Initialization before passing control to the adaptor ROM at E000hm is completed. Pass control to the adaptor ROM at E000h next Erase F2 prompt
A9 Returned from adaptor ROM at E000h control. Performing any initialization required after the E000 option ROM had control next
AA Initialization after E000 option ROM control has completed. Display the system configuration next Scan for F2 key stroke
AB Uncompress the DMI data and execute DMI POST initialization next
AC Enter SETUP
AE Clear boot flag
B0 If Interrupts Occurs in Protecting Mode The system configuration is displayed. Check for errors
B1 If non masked NMI Occurs, Display “Press F1 to Disable
Copy any code to specific areas. Inform RomPilot about the end of POST.
B2 POST is done – prepare to boot operating system
B4 1 One short beep before boot
B5 Terminate QuietBoot (optional
B6 Check password (optional)
B7 Initialize ACPI BIOS
B9 Prepare Boot
BA Initialize SMBIOS
BB Initialize PnP Option ROMs
BC Clear parity checkers
BD Display MultiBoot menu
BE Program chipset registers with power on BIOS defaults Clear screen (optional)
BF Program the rest of the chipset’s value according to setup (later setup value program) Check virus and backup reminders
If auto configuration is enabled, programmed the chipset with predefined values in the MODBINable Auto Table
C0 Turn off OEM specific cache, shadow Try to boot with INT 19
Initialize standard devices with default values: DMA controller (8237); Programmable Interrupt Controller (8259); Programmable Interval Timer (8254); RTC chip.
C1 OEM Specific-Test to Size On-Board Memory Initialize POST Error Manager (PEM)
C2 Initialize error logging
C3 Test the first 256K DRAM Initialize error display function
Expand the compressed codes into temporary DRAM area including the compressed system BIOS & Option ROMs.
C4 Initialize system error handler
C5 Enable OEM Specific-Early Shadow for Fast Boot PnPnd dual CMOS (optional)
C6 External Cache Size Detection Initialize note dock (optional)
C7 Initialize note dock late
C8 Force check (optional)
C9 Extended checksum (optional)
CA Redirect Int 15h to enable remote keyboard
CB Redirect Int 13h to Memory Technologies Devices such as ROM, RAM, PCMCIA, and serial disk
CC Redirect Int 10h to enable remote serial video
CD Re-map I/O and memory for PCMCIA
CE Initialize digitizer and display message
D0 The NMI is disabled. Power on delay is starting. Next, the initialization code checksum will be verified.
D1 Initialize the DMA controller and perform the keyboard controller BAT test. Start to refresh memory and enter 4 GB flat mode next.
D2 Unknown interrupt
D3 Start memory sizing next
D4 Return to real mode. Execute any OEM patches and set the stack next.
D5 Pass control to the uncompressed code in shadow RAM at E000:0000h. The initialization code is copied to segment 0 and the control will be transferred to segment 0
D6 Control is in segment 0. Next, checking if <Ctrl> <Home> was pressed and verifying the system BIOS checksum. If either <Ctrl> or <Home> was pressed or the system BIOS checksum is bad, next it will go to checkpoint code E0h. Otherwise, It goes to checkpoint code D7h.
E0 The onboard floppy controller if available is initialized. Next, begin the base 512 KB memory test Initialize the chipset
E1 E1 Setup – Page E1 Initialize the interrupt vector table next Initialize the bridge
E2 E2 Setup – Page E2 Initialize the DMA and Interrupt controllers next. Initialize the CPU
E3 E3 Setup – Page E3 Initialize system timer
E4 E4 Setup – Page E4 Initialize system I/O
E5 E5 Setup – Page E5 Check force recovery boot
E6 E6 Setup – Page E6 Enable the floppy drive controller and Timer IRQs. Enable internal cache memory. Checksum BIOS ROM
E7 E7 Setup – Page E7 Go to BIOS
E8 E8 Setup – Page E8 Set Huge Segment
E9 E9 Setup – Page E9 Initialize Multi Processor
EA EA Setup – Page EA Initialize OEM special code
EB EB Setup – Page EB Initialize PIC and DMA
EC EC Setup – Page EC Initialize Memory type
ED ED Setup – Page ED Initialize the floppy drive. Initialize Memory size
EE EE Setup – Page EE Look for a floppy diskette in drive A:. Read the first sector of the diskette Shadow Boot Block
EF EF Setup – Page EF A read error occurred while it reads the floppy drive in drive A:. System memory test
F0 Next, searc
h for the AMIBOOT.ROM file in the root directory. Initialize interrupt vectors
F1 The AMIBOOT.ROM file is not in the root directory Initialize Run Time Clock
F2 Next, read and analyze the floppy diskette FAT to find the clusters occupied by the AMIBOOT.ROM file Initialize video
F3 Next, read the AMIBOOT.ROM file, cluster by cluster. Initialize System Management Manager
F4 The AMIBOOT.ROM file is not the correct size Output one beep
F5 Next, disable internal cache memory. Clear Huge Segment
F6 Boot to Mini DOS
F7 Boot to Full DOS
FB Next, detect the type of flash ROM.
FC Next, erase the flash ROM.
FD Next, programme the flash ROM
FF Int 19 Boot Attempt
Flash ROM programming was successful. Next, restart the system BIOS.
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